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clocked load

См. также в других словарях:

  • Depletion-load NMOS logic — Depletion load nMOS/NMOS (n channel metal oxide semiconductor) is a form of nMOS logic family which uses depletion mode n type MOSFETs as load transistors as a method to enable single voltage operation and achieve greater speed than possible with …   Wikipedia

  • Zilog Z80 — One of the first Z80 microprocessors manufactured; the date stamp is from June 1976. Produced 1976 Common manufacturer(s) Zilog …   Wikipedia

  • Radeon R200 — ATIGPU name = Radeon 8500 9250 Series codename = Chaplin created = Late 2001 entry = 9200SE midrange = 9000, 9200, 9250, 8500LE/9100 highend = 8500 d3dversion = 8.1, Shader Model 1.4AMD chipsets Table name=Radeon R200 based chipsets CPU= Pentium… …   Wikipedia

  • Dynamic logic (digital logic) — In integrated circuit design,dynamic logic (or sometimes clocked logic) is a design methodology logic family in digital logic that was popular in the 1970s and has seen a recent resurgence in the design of high speed digital electronics,… …   Wikipedia

  • Dynamic logic (digital electronics) — For the subject in theoretical computer science, see dynamic logic (modal logic). In integrated circuit design, dynamic logic (or sometimes clocked logic) is a design methodology in combinatorial logic circuits, particularly those implemented in… …   Wikipedia

  • MIPS architecture — MIPS (originally an acronym for Microprocessor without Interlocked Pipeline Stages) is a RISC microprocessor architecture developed by MIPS Technologies. As of|1999|alt=By the late 1990s it was estimated that one in three RISC chips produced were …   Wikipedia

  • Headlamp — Headlight redirects here. For other uses, see Headlight (disambiguation). High Beams redirects here. For the urban legend also known by that name, see Killer in the backseat. A motor scooter s front with an impractical number and variety of… …   Wikipedia

  • Cell (microprocessor) — Cell is a microprocessor architecture jointly developed by Sony Computer Entertainment, Toshiba, and IBM, an alliance known as STI . The architectural design and first implementation were carried out at the STI Design Center in Austin, Texas over …   Wikipedia

  • XScale — The XScale, a microprocessor core, is Intel s and Marvell s implementation of the ARMv5 architecture, and consists of several distinct families: IXP, IXC, IOP, PXA and CE (see more below). Intel sold the PXA family to Marvell Technology Group in… …   Wikipedia

  • Underclocking — See also: Dynamic frequency and voltage scaling Underclocking, also known as downclocking, is the practice of modifying a synchronous circuit s timing settings to run at a lower clock rate than it was specified to operate at. It may be said to be …   Wikipedia

  • POWER1 — The POWER1 is a multi chip CPU developed and fabricated by IBM that implemented the POWER instruction set architecture (ISA). It was originally known as the “RISC System/6000 CPU” or when an abbreviated form, the “RS/6000 CPU” before introduction …   Wikipedia

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